alioth/src/device/pl031.rs - 4575b33

pl031.rs87.93%

// Copyright 2025 Google LLC
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//     https://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
 
//! Emulated PL031 Real Time Clock (RTC) device.
//! See: https://developer.arm.com/documentation/ddi0224/c
 
use parking_lot::Mutex;
 
use crate::device::clock::Clock;
use crate::device::{MmioDev, Pause, Result};
use crate::mem::emulated::{Action, Mmio};
use crate::{bitflags, mem};
 
const RTC_DR: u64 = 0x000;
const RTC_MR: u64 = 0x004;
const RTC_LR: u64 = 0x008;
const RTC_CR: u64 = 0x00C;
const RTC_IMSC: u64 = 0x010;
const RTC_RIS: u64 = 0x014;
const RTC_MIS: u64 = 0x018;
const RTC_ICR: u64 = 0x01C;
 
const RTC_PERIPH_ID0: u64 = 0xFE0;
const RTC_PERIPH_ID1: u64 = 0xFE4;
const RTC_PERIPH_ID2: u64 = 0xFE8;
const RTC_PERIPH_ID3: u64 = 0xFEC;
const RTC_PCELL_ID0: u64 = 0xFF0;
const RTC_PCELL_ID1: u64 = 0xFF4;
const RTC_PCELL_ID2: u64 = 0xFF8;
const RTC_PCELL_ID3: u64 = 0xFFC;
 
const PERIPH_ID: [u8; 4] = [0x31, 0x10, 0x04, 0x00];
const PCELL_ID: [u8; 4] = [0x0d, 0xf0, 0x05, 0xb1];
 
bitflags! {
    #[derive(Default)]
    struct Interrupt(u32) {
        RTCINTR = 1 << 0;
    }
}
 
#[derive(Debug, Default)]
struct Pl031Reg {
    mr: u32,
    lr: u32,
    offset: u32,
}
 
#[derive(Debug)]
pub struct Pl031<C> {
    name: Box<str>,
    reg: Mutex<Pl031Reg>,
    clock: C,
}
 
impl<C> Pl031<C> {
    pub fn new(base_addr: u64, clock: C) -> Self {3x
        Self {3x
            name: Box::from(format!("pl031@{base_addr:x}")),3x
            reg: Mutex::new(Pl031Reg::default()),3x
            clock,3x
        }3x
    }3x
}
 
impl<C: Clock> Pl031<C> {
    fn now(&self) -> u32 {9x
        self.clock.now().as_secs() as u329x
    }9x
}
 
impl<C: Clock> Mmio for Pl031<C> {
    fn size(&self) -> u64 {3x
        0x10003x
    }3x
 
    fn read(&self, offset: u64, _size: u8) -> mem::Result<u64> {51x
        let reg = self.reg.lock();51x
        let val = match offset {51x
            RTC_DR => reg.offset.wrapping_add(self.now()),6x
            RTC_MR => reg.mr,3x
            RTC_LR => reg.lr,3x
            RTC_CR => 1,                       // RTC is always enabled3x
            RTC_IMSC | RTC_RIS | RTC_MIS => 0, // Interrupts are not supported9x
            RTC_PERIPH_ID0 => PERIPH_ID[0] as u32,3x
            RTC_PERIPH_ID1 => PERIPH_ID[1] as u32,3x
            RTC_PERIPH_ID2 => PERIPH_ID[2] as u32,3x
            RTC_PERIPH_ID3 => PERIPH_ID[3] as u32,3x
            RTC_PCELL_ID0 => PCELL_ID[0] as u32,3x
            RTC_PCELL_ID1 => PCELL_ID[1] as u32,3x
            RTC_PCELL_ID2 => PCELL_ID[2] as u32,3x
            RTC_PCELL_ID3 => PCELL_ID[3] as u32,3x
            _ => {
                log::warn!("{}: read from unknown offset {offset:#x}", self.name);3x
                03x
            }
        };
        log::trace!("{}: read {val:#x} from offset {offset:#x}", self.name);51x
        Ok(val as u64)51x
    }51x
 
    fn write(&self, offset: u64, _size: u8, val: u64) -> mem::Result<Action> {18x
        let mut reg = self.reg.lock();18x
        let val = val as u32;18x
        match offset {18x
            RTC_MR => reg.mr = val,3x
            RTC_LR => {3x
                reg.offset = val.wrapping_sub(self.now());3x
                reg.lr = val;3x
            }3x
            RTC_CR => {} // RTC is always enabled3x
            RTC_IMSC => {
                // Interrupt is alwasy masked
                if Interrupt::from_bits_retain(val).contains(Interrupt::RTCINTR) {3x
                    log::warn!("{}: guest tries to unmask interrupt", self.name);3x
                }
            }
            RTC_ICR => {} // Interrupts are not supported3x
            _ => {
                log::warn!(3x
                    "{}: write {val:#x} to unknown offset {offset:#x}",
                    self.name,
                );
            }
        };
        log::trace!("{}: write {val:#x} to offset {offset:#x}", self.name);18x
        Ok(Action::None)18x
    }18x
}
 
impl<C: Clock> Pause for Pl031<C> {
    fn pause(&self) -> Result<()> {
        Ok(())
    }
 
    fn resume(&self) -> Result<()> {
        Ok(())
    }
}
 
impl<C: Clock> MmioDev for Pl031<C> {}
 
#[cfg(test)]
#[path = "pl031_test.rs"]
mod tests;
 