alioth/src/mem/emulated.rs - f5bf11a

emulated.rs92.11%

// Copyright 2024 Google LLC
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//     https://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
 
use std::cmp::min;
use std::fmt::Debug;
use std::sync::Arc;
 
use crate::mem::addressable::{Addressable, SlotBackend};
use crate::mem::{Memory, Result};
use crate::utils::truncate_u64;
 
#[cfg(not(test))]
pub trait ChangeLayout: Debug + Send + Sync + 'static {
    fn change(&self, memory: &Memory) -> Result<()>;
}
#[cfg(test)]
pub trait ChangeLayout: Debug + Send + Sync + std::any::Any + 'static {
    fn change(&self, memory: &Memory) -> Result<()>;
}
 
#[derive(Debug)]
pub enum Action {
    None,
    Shutdown,
    Reset,
    ChangeLayout { callback: Box<dyn ChangeLayout> },
}
 
pub trait Mmio: Debug + Send + Sync + 'static {
    fn read(&self, offset: u64, size: u8) -> Result<u64>;
    fn write(&self, offset: u64, size: u8, val: u64) -> Result<Action>;
    fn size(&self) -> u64;
}
 
impl Mmio for Arc<dyn Mmio> {
    fn read(&self, offset: u64, size: u8) -> Result<u64> {234x
        Mmio::read(self.as_ref(), offset, size)234x
    }234x
 
    fn write(&self, offset: u64, size: u8, val: u64) -> Result<Action> {93x
        Mmio::write(self.as_ref(), offset, size, val)93x
    }93x
 
    fn size(&self) -> u64 {606x
        Mmio::size(self.as_ref())606x
    }606x
}
 
impl SlotBackend for Arc<dyn Mmio> {
    fn size(&self) -> u64 {1767x
        Mmio::size(self.as_ref())1767x
    }1767x
}
 
#[macro_export]
macro_rules! impl_mmio_for_zerocopy {
    ($ty:ident) => {
        impl $crate::mem::emulated::Mmio for $ty {
            fn size(&self) -> u64 {3x
                ::core::mem::size_of::<Self>() as u643x
            }3x
 
            fn read(&self, offset: u64, size: u8) -> $crate::mem::Result<u64> {205x
                fn read_from_prefix<T: ::zerocopy::FromBytes + Into<u64>>(159x
                    bytes: &[u8],159x
                ) -> ::core::option::Option<u64> {159x
                    let (n, _) = T::read_from_prefix(bytes).ok()?;159x
                    Some(n.into())159x
                }159x
 
                let bytes = ::zerocopy::IntoBytes::as_bytes(self);205x
                let offset = offset as usize;205x
                let val = match size {205x
                    1 => bytes.get(offset).map(|b| *b as u64),46x
                    2 => bytes.get(offset..).and_then(read_from_prefix::<u16>),75x
                    4 => bytes.get(offset..).and_then(read_from_prefix::<u32>),81x
                    8 => bytes.get(offset..).and_then(read_from_prefix::<u64>),3x
                    _ => ::core::option::Option::None,
                };
 
                if let ::core::option::Option::Some(val) = val {205x
                    ::core::result::Result::Ok(val)205x
                } else {
                    ::log::error!(
                        "{}: invalid read access, offset = {offset:#x}, size = {size}.",
                        ::core::any::type_name::<Self>()
                    );
                    ::core::result::Result::Ok(0)
                }
            }205x
 
            fn write(3x
                &self,3x
                offset: u64,3x
                size: u8,3x
                val: u64,3x
            ) -> $crate::mem::Result<$crate::mem::emulated::Action> {3x
                ::log::error!(3x
                    "{}: write 0x{val:0width$x} to readonly offset 0x{offset:x}.",
                    ::core::any::type_name::<Self>(),3x
                    width = 2 * size as usize3x
                );
                Ok($crate::mem::emulated::Action::None)3x
            }3x
        }
    };
}
 
#[derive(Debug)]
pub struct MmioBus<R = Arc<dyn Mmio>>
where
    R: Debug + SlotBackend,
{
    pub(crate) inner: Addressable<R>,
}
 
impl<R> Default for MmioBus<R>
where
    R: Debug + SlotBackend + Mmio,
{
    fn default() -> Self {
        Self::new()
    }
}
 
impl<R> MmioBus<R>
where
    R: Debug + SlotBackend + Mmio,
{
    pub fn new() -> MmioBus<R> {211x
        Self {211x
            inner: Addressable::new(),211x
        }211x
    }211x
 
    pub fn is_empty(&self) -> bool {89x
        self.inner.is_empty()89x
    }89x
 
    pub fn add(&mut self, addr: u64, range: R) -> Result<()> {600x
        self.inner.add(addr, range)?;600x
        Ok(())600x
    }600x
 
    pub(super) fn remove(&mut self, addr: u64) -> Result<R> {18x
        self.inner.remove(addr)18x
    }18x
 
    pub fn read(&self, addr: u64, size: u8) -> Result<u64> {150x
        let mut count = 0;150x
        let mut val = 0;150x
        let size = size as u64;150x
        while count < size {420x
            let base_addr = addr + count;309x
            let Some((start, dev)) = self.inner.search_next(base_addr) else {309x
                break;6x
            };
            count += start.saturating_sub(base_addr);303x
            let offset = base_addr.saturating_sub(start);303x
            let mut read_size = min(Mmio::size(dev) - offset, size.saturating_sub(count));303x
            if read_size == 0 {303x
                break;33x
            }270x
            read_size = min(read_size, 1 << read_size.trailing_zeros());270x
            if offset > 0 {270x
                read_size = min(read_size, 1 << offset.trailing_zeros());42x
            }228x
            val |= truncate_u64(dev.read(offset, read_size as u8)?, read_size) << (count << 3);270x
            count += read_size;270x
        }
        Ok(val)150x
    }150x
 
    pub fn write(&self, addr: u64, size: u8, val: u64) -> Result<Action> {63x
        let mut count = 0;63x
        let size = size as u64;63x
        let mut action = Action::None;63x
        while count < size {162x
            let base_addr = addr + count;117x
            let Some((start, dev)) = self.inner.search_next(base_addr) else {117x
                break;3x
            };
            count += start.saturating_sub(base_addr);114x
            let offset = base_addr.saturating_sub(start);114x
            let mut write_size = min(Mmio::size(dev) - offset, size.saturating_sub(count));114x
            if write_size == 0 {114x
                break;15x
            }99x
            write_size = min(write_size, 1 << write_size.trailing_zeros());99x
            if offset > 0 {99x
                write_size = min(write_size, 1 << offset.trailing_zeros());15x
            }84x
            let write_val = truncate_u64(val >> (count << 3), write_size);99x
            let r = dev.write(offset, write_size as u8, write_val)?;99x
            if matches!(action, Action::None) {99x
                action = r99x
            } else {
                // TODO: handle multiple side effects caused by a single write
                log::error!(
                    "Write {write_val:#x} to {:#x}: dropped: {action:#x?}",
                    start + offset
                );
            }
            count += write_size;99x
        }
        Ok(action)63x
    }63x
}
 
#[cfg(test)]
#[path = "emulated_test.rs"]
mod tests;
 